Designing high-speed and
low-latency wireless communication systems

Introduction

The Internet of Things (IoT) facilitates data exchange and seamless communication among physical objects, such as sensors, RFID tags, mobile phones, vehicles, and other electronic-embedded devices. IoT connectivity Involves a vast array of low-cost, low-power devices and is crucial in supporting intelligent applications by transmitting diverse environmental data reliably and efficiently. It is also instrumental in achieving real-time control and automation across dynamic processes like industrial automation, manufacturing, energy distribution, and intelligent transport systems. IoT necessitates communication systems to have high reliability, availability, and minimal end-to-end latency at the millisecond level. This article explores the design principles for creating Wireless Communication Systems offering high-speed and low-latency performance.

Latency and its significance in wireless communication

Latency in a communication network refers to the time required for information to traverse from a sender to a receiver. The widely used measure of latency is the round-trip time (RTT). The RTT represents a packet's duration from sender to receiver and back. Despite being a singular value, latency is an amalgamation of delays encountered in various network segments. Specifically, RTT is the total time for data to traverse from sender to receiver, including the acknowledgment's return journey across multiple hops. Three key elements influence latency in a communication network:

• Propagation time: The time taken for a data packet to travel from one location to another, linked to the shortest physical distance between the two points.


• Routing/switching time: When data moves from one location to another, it must traverse multiple links, necessitating routing/switching. Delays may occur during data handoff at routers and network interconnections, often due to buffering at these intermediate points.


• Congestion: Network congestion results in queued data packets, requiring them to wait until space is available for transmission. In the case of acknowledgment-based protocols like TCP, congestion leads to retransmissions and delays in packet delivery to the receiver. In extreme situations, the network may drop the packets if it cannot accommodate them.

Cross-layer design for low latency wireless system

The design of wireless radio access depends on the Physical (PHY) and Medium Access Control (MAC) layers. The PHY layer oversees several baseband processing tasks, like channel coding, modulation, and waveform shaping. Following this, the data processed by PHY undergoes transmission through Radio Frequency (RF) circuits across a wireless channel. Throughout data transmission, the PHY layer adheres to specific parameters set by MAC layer configurations to ensure compliance with quality of service (QoS) requirements. The communication protocol devised in the upper layer handles the selection of these parameters. The cross-layer design is executed through the formulation of a multi-objective optimization problem, represented as:

Here, the integer k represents the number of objectives, and the set X constitutes the feasible set of decision elements—specifically, a set of PHY system parameters. The function fk(x) represents an objective function in PHY system design, corresponding to essential performance metrics. Additionally, Ck signifies the design constraints. In the context of PHY system design, the collection of PHY system parameters encompasses elements like modulation coding scheme, FEC scheme, coding rate, number of spatial streams, transmission bandwidth, packet format, and more. Conversely, the objective functions encapsulate latency and reliability requirements. The primary aim of the cross-layer design is to establish system parameters for a specified set of parameters p1, p2, p3, ..., pi to ensure minimized latency, maximize reliability, and reduce energy efficiency. The design constraint must be subjected to transmission delay (Tdelay <; 100 µs) and probability error threshold(Pe th <; 10−3) within a working duration of one year.

The cross-layer design focuses on the PHY and MAC of the industrial WLAN system (iWLAN), as depicted in Figure 1. The aim is to reduce latency and enhance reliability. Numerous challenges within these layers are intricately enmeshed, impacting the overall system performance. The MAC component's cross-layer design encompasses protocol timing, user scheduling, data exchange mechanisms, and signaling methods. These mechanisms directly influence the design of the PHY system, necessitating compliance with pre-defined upper-layer protocols.

Conversely, the PHY system involves extensive baseband signal processing. Factors like employed transceiver algorithms, latency timing processing, and achieving low-complexity implementations are crucial considerations within this layer. The timing processing in PHY is critical for the entire system to meet specified protocol requirements. Moreover, the PHY system is pivotal in determining overall system reliability, as link-level performance significantly contributes to transmission reliability.

Figure 1: Cross-layer design for iWLAN system

Implementing industrial wireless networks involves challenges related to achieving low latency and highly reliable communication. However, power consumption management becomes critical during developing extensive industrial wireless systems. It is tough to address all these constraints simultaneously when design considerations are confined to individual layers. Achieving an effective cross-layer design necessitates a comprehensive grasp of the trade-offs among reliability, latency, and energy efficiency. According to information theory, the data rate of a channel affected by Additive white Gaussian noise (AWGN) - a type of noise often used to model the random disturbances affecting signals in communication systems - channel is given by:

Where Pˆ denotes the transmit power and g is the channel gain. The data rate, R, is inversely proportional to transmit time for one-bit t. Then, the energy consumption per bit can be expressed as:

This equation exhibits a monotonically decreasing trend concerning transmission time. Therefore, to minimize energy consumption, it is necessary to extend the duration of packet data transmission, which is achieved through the utilization of low data rate transmission. This transmission strategy can be implemented by employing low-order modulation, such as BPSK or QPSK, resulting in higher reliability in packet transmission. However, this approach introduces a trade-off, leading to longer packet latency. In practical implementation, it is crucial to consider the circuit's power consumption. Consequently, the total energy consumption is expressed as:

Where Pc is the average circuit power that is proportional to circuit size (e.g., parasitic capacitance), operating voltage, and clock frequency, following the equation:

The energy consumption per bit is depicted in Figure 2. In this scenario, reducing energy by prolonging transmit time becomes impractical, as the power consumption is predominantly influenced by circuit power, which escalates with longer transmit durations.

Figure 2: Energy consumption and transmission duration

Recent wireless systems have included advanced techniques such as the MIMO scheme to reduce the transmission time and lower delay constraints. The MIMO technique improves spectral efficiency and channel capacity, reducing transmission time. It also boosts system reliability by leveraging diversity via multiple antennas. Shortening transmission times helps reduce the consumption of required transmit and circuit power. However, the benefits of MIMO techniques come with the drawback of larger circuit size due to duplication of transmitter and receiver chains for each antenna stream. Therefore, a thorough investigation and characterization of the designed system for achieving an optimum system with a balanced trade-off should be conducted. This serves as the foundation for determining an effective design approach to achieve a low-power system while maintaining system reliability and latency.

Massive MIMO design procedure for low latency high-speed wireless communication

MIMO is a technique used to increase spectral efficiency and improve the performance of wireless communication. It uses multiple transmission and receiving antennas to take advantage of the multipath features of wireless signals. In Figure 3, the schematic diagram represents a single-cell massive MIMO system. It improves the average channel capacity in non-the-adding additive white Gaussian noise (AWGN) and Rayleigh fading channels.

Figure 3: Single-cell massive MIMO

MIMO is widely used in recent wireless communications standards like IEEE 802.11n and IEEE 802.11ac Wi-Fi and extends to cellular networks and beyond. MIMO can be found in many forms; the simplest one is point-to-point MIMO, represented by a single BS with M antennas that serve a single user equipment (UEs) with k antennas. Point-to-point MIMO can serve multiple UEs but must be orthogonally multiplexed in time and frequency. Another form of MIMO is the multi-user MIMO (MU-MIMO), consisting of a single base station (BS) with M antennas serving k number of UEs. Each has a single antenna (or more) using the same frequency-time resources, increasing spectral efficiency compared to the point-to-point MIMO. Massive MIMO is the ultimate version of MU-MIMO, and it is more scalable with a much greater number of BS antennas. The number of BS antennae is larger than the number of UEs served. In massive MIMO, each BS may have hundreds or thousands of antennas that can serve tens or hundreds of UEs using the same frequency resources. When massive MIMO operates in a time division duplex (TDD) and exploits the reciprocity of the channel, the resources required for pilots depend only on the number of active UEs. So, only BTS must have CSI, and no channel estimation is required at UEs because of channel hardening. Massive MIMO is scalable when the number of BS antennas increases and provides nearly optimal linear processing at BS.